This disclosure relates to methods for forming metal wires or lines in semiconductor systems.
Forming metal lines or wires in semiconductor systems presents many challenges. In some situations the metal is used to fill some feature such as, but not limited to, a trench or via. Trenches, vias, and other features can be difficult to fill, especially if they have a high aspect ratio. Sometimes the metal will not completely fill the feature such that voids are present.
Another challenge with forming metal lines or wires is to achieve a smooth surface. Some techniques for forming metal lines result in the metal having a rough surface. One option is to planarize the surface. However, planarizing can lead to uneven thicknesses.
Furthermore, it is desirable for the metal to have low resistivity. However, some techniques result in the metal having undesirably high resistivity, especially at certain interfaces.
Some techniques make a tradeoff in which one or more qualities are sacrificed in favor of others. For example, smoothness and uniform thickness may be sacrificed in favor of low resistivity. Thus, achieving all or most of the above can be difficult.